Table-Lookup Approach for Compiling Two-Level Data-Processor Mappings in HPF

This paper presents compilation techniques to compress holes, which are memory locations mapped by useless template cells and are caused by the non-unit alignment stride in a two-level data-processor mapping. A two-level data-processor mapping provides user to specify data-processor mapping by aligning related array objects with a template, and then distributing the template onto the user-declared abstract processors. In a two-level data-processor mapping, there is a repeated pattern for array elements mapped onto processors. We classify blocks into classes and use a class table to record the attributes of classes for the data distribution. Similarly, data distribution on a processor also has a repeated pattern. We use compression table to record the attributes of the rst data distribution pattern on that processor. By using class table and compression table, hole compression can be easily and eeciently achieved. Compressing holes can save memory usage, improve spatial locality and further increase system performance. The proposed method is eecient, stable and easy implement. The experimental results do connrm the advantages of our proposed method over existing methods.